Qualcomm is the world's leading developer of next-generation wireless and multimedia technology. Qualcomm is committed to building a world-class organization that will lead the industry in Multimedia technology. Be part of the group that enables these exciting features on mobile devices. It's fun and it's here! Be a part of ASIC Design and the Design Verification Team responsible for development of Next Generation Multimedia Subsystems embedded in Mobile Phone and Tablet Processors SOCs.
The ASIC Design role involves designing as well as integrating a variety of complex functional blocks that will be integrated into multiple ASICs. Responsibilities include:
Subsystem and Core microarchitecture
Design and integration of functional subblocks and control logic
Collaboration and coordination with multiple teams located across multiple sites and integration of their core IP into the functional subsystem
Collaboration with the Chip teams for the integration of the subsystem into various chips
Generating and analyzing the data created through a vast variety of tools (Synthesis, timing analysis and closure, Design rule checks, formal verification, design simulation/verification, timing/power/signal integrity analysis, DFT, interaction with Physical design teams on timing/area/Signal Integrity closure)
Development of design methodology, flow automation and improvements, training and rollout to the HW team
Excellent interpersonal and teamwork skills
Ability to work in a fast paced environment
The Design Verification role involves design verification activities to ensure functional and performance targets are achieved during the pre-silicon phase of next generation ASIC development at core, subsystem and chip levels. This involves test plan definition, test bench creation, test development/implementation, execution and code/functional coverage closure in partnership with the ASIC teams. In addition, system level performance validation is done in conjunction with the Architectural and Performance Analysis teams. The platforms used for both functional and performance verification include RTL simulation (all simulators), Simulation Acceleration and Emulation.
The Design Verification role also provides opportunities to develop and implement verification infrastructures, tools and flows to continuously improve efficiency and automate the design verification processes.
As a lead design centre within Qualcomm, there will be many opportunities to work with many different teams throughout the Qualcomm community and also external EDA/IP vendors.
A successful ASIC Design candidate strong knowledge of EDA tools and flows, experience in design flow and methodology development
Experience in Computer and Multimedia architecture (Display, Video, Graphics, clock control, low power, etc.)
5 or more years of proven experience in Hi-Speed/Low power/Digital Submicron ASIC design within a Unix environment
Strong and proven Experience with Verilog/VHDL, Synopsys/Cadence/Mentor ASIC design and simulation tool sets (DC, RC, power compiler, primetime, Modeltech, VCS, NCSIM, power theatre, etc.), design rule check (Spyglass,etc.), Formal verification(Formality,LEC, etc.), power analysis and simulation, scripting languages (PERL, TCL, C, etc.)
A successful DV candidate will be detail oriented with strong analytic and debugging skills, strong knowledge of digital circuits, good understanding of Object Oriented Programming (OOP) concepts and strong written and verbal communication skills.
Experience in Hardware verification languages (HVL) such as Vera, SystemVerilog testbench (OVM/UVM) and SystemC and Hardware description languages (HDL) such as Verilog, SystemVerilog and VHDL is preferred.
Experience in software languages such as C/C++ and scripting languages such as perl, GNU make and shell scripts is preferred.
Experience in the following disciplines is preferred:
fundamental knowledge of ASIC architecture, CPU (ARM v7, Cache, MMU, security, etc.), graphics (OpenGL ES, DirectX, etc.), video (H.264, H.263, VC-1, etc.), audio (MP3, MIDI, MIPI SlimBus, etc.), display (MIPI DSI, HDMI, MHL, DisplayPort, etc.), camera (MIPI CSI, ISP), bus interface and protocols (AHB, AXI), memory sub-system Quality of Service principles and memory controllers (LPDDRx, PCDDRx, etc.).
Bachelor's or Masters or Ph. D. in Computer Engineering, Computer Science, Electrical Engineering or related field of study.
- 10 months ago