QUALCOMM CDMA Technologies (QCT) is the largest provider of 3G chipset and software technology in the world, with chipsets shipped to more than 50 customers and powering the majority of all 3G devices commercially available. QCT partners with nearly 60 3G network operators around the globe and has the largest CDMA engineering team in the wireless industry.
QCT provides complete chipset solutions and integrated applications from the Launchpad suite of advanced technologies. Our integrated solutions offer device manufacturers reduced bill-of-materials costs, time-to-market, and development time. Mobile handsets powered by QCT chipsets can offer more features while maintaining a smaller, sleeker form-factor and benefiting from reduced power demands.
QCT values collaboration with its customers and partners and works closely with them to enable their success. We offer a wide range of tools to support the device development process, and develop new technologies based on the needs and demands of the wireless market. Devices for all market segments can now include features enabled by 3G wireless technologies, in demand by a growing and increasingly sophisticated wireless community.
QUALCOMM CDMA Technologies (QCT) is looking for an experienced ASIC Design & Integration Engineer to be part of our global team developing next generation ASICs for Wireless and portable applications.
As part of the ASIC Emulation team, the successful candidate will work in various projects in prototyping the ASIC design into multi FPGA systems.
Participate with multi site teams during architecture definition stages.
High level design and documentation of complex FPGA implementations.
Detailed FPGA design, debug, and documentation using Verilog / VHDL and commercial tool sets.
Active participation in system level debug and verification.
Generating and analyzing the data created through a vast variety of tools (Synthesis, timing analysis, design rule checks, formal verification, design simulation/verification etc...)
Development of design methodology, flow automation and improvements, training and rollout to various teams.
Implement the design using Verilog and/or VHDL.
Responsible for the integration, building and validation of complex high speed FPGAs.
Review and document design detail implementations.
Verify the implementation using simulation tests on FPGA specific test bench.
Target the design to a Xilinx device using synthesis and place and route tools.
Able to work in a fast-paced development team, working closely with hardware and software engineers across multi locations during build, integration and validation.
Develop and maintain various scripts.
5 or more years of proven experience in Hi-Speed/Low power/Digital Submicron ASIC design within a Unix environment
Demonstrated working experience with State-of-the-Art FPGAs and associated development tools
Strong and proven experience in Verilog and VHDL (System Verilog desirable).
Proficiency with Synopsis (Synplify synthesis, Certify partition, Identify debug), Xilinx ISE and ModelSim simulation tools
Experience with integration of FPGA IP cores
Knowledge of scripting languages (PERL, TCL, C/C++, etc.)
Ability to read and understand schematics.
Detailed oriented with strong analytic and debugging skills.
BS in Electrical Engineering or related field of study required. MS preferred.