Spectra7 Microsystems Inc. is a high performance analog semiconductor company delivering unprecedented speed, resolution and signal fidelity to consumer and wireless infrastructure products. Spectra7's new system-level components address throughput bottlenecks and satisfy the exponential demand for more bandwidth and lower costs in mobile and internet infrastructure equipment, including handsets, tablets, base stations and microwave backhaul systems.
Spectra7 is headquartered in Markham, Ontario with development centers in Silicon Valley, Irvine, California and Cork, Ireland.
- Will take on responsibility for design of groundbreaking, innovative interference cancellation system blocks in Digital ASIC
- Deliver ASIC RTL architectures and implementation for high-speed and wireless communication systems
- Develop floating and fixed point system model in MATLAB: cost effective considerations, optimize system parameters, identify performance limiting factors, etc
- Deliver working FPGA systems for product prototypes and evaluation
- Engage in all steps of ASIC/FPGA design flow: implementation, simulation, verification, synthesis, etc..
- Develop bit-accurate models to ensure the correctness of RTL implementation
- Plan and execute system level test plans using MATLAB, Perl, C/C++.
- Collaborate with other teams to implement DSP designs and mixed-mode analog circuits
- Work closely with physical design engineers to resolve issues and ensure correct implementation
- Post silicon lab validation and test automation
- 10+ years of experience delivering complex ASIC designs to production including experience in system modeling of signal integrity
- Experience with FPGA-based prototyping
- Must have extensive experience with high speed Verilog design, verification, synthesis and logical equivalency checking
- Proficient in Matlab, C, Perl, and Tcl
- Experience in MIMO and/or Wireless modems is highly desirable
- Knowledge of advanced digital signal processing techniques: multi-rate signal processing, adaptive filtering, fixed point filter design and considerations, optimization methods.
- Knowledge of advanced FPGA prototype debug tools is desirable
- Experience with lab equipment: VSA, VSG, spectrum analyzers, tone generators, digital power supply, etc.
- Knowledge DFT concepts of Scan and BIST is an asset
- Experience in design of JESD207, JESD204b, LVDS is an asset