IC CAD Engineer - Intermediate Level
Sidense - Ottawa, ON

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Sidense provides secure, dense and reliable non-volatile, one-time programmable (OTP) memory IP for use in standard-logic CMOS processes with no additional masks or process steps. The Company’s innovative one-transistor 1T-Fuse™ architecture provides the industry’s smallest footprint, most reliable and lowest power Logic Non-Volatile Memory (NVM) IP solution. With over 100 patents granted or pending, Sidense OTP provides a field-programmable alternative solution to Flash, mask ROM and eFuse in many OTP and MTP applications.

Sidense OTP memory, embedded in over 100 customer designs, is available from 180nm down to 28nm and is scalable to 20nm and below. The IP is offered at and has been adopted by all top-tier semiconductor foundries and selected IDMs. Customers are using Sidense OTP for analog trimming, code storage, encryption keys such as HDCP, WHDI, RFID and Chip ID, medical, automotive, and configurable processors and logic.

Sidense is headquartered in Ottawa, Ontario and services an expanding worldwide customer base.

Role Summary: As a CAD Engineer you will be responsible for the CAD environment; supporting the Engineering and R&D groups in the development of OTP memory products for multiple foundries and technology nodes. Your responsibilities will include scoping and management of software, evaluation and recommendation of tools, updates and the development and the implementation of a CAD training curriculum.

This role will coordinate with our Engineering, Operations, and Research and Development groups to develop an efficient and powerful environment to expedite the development of new products and test chips across many different foundries and process nodes.

The ideal candidate must demonstrate an exceptional desire to help others, working knowledge of Electronic Design Automation (EDA) tools, self-motivation and a passion to solve problems in an effective and efficient manner. Candidates must demonstrate an ability to design process flows and document the systems and data flows used.


  • Support and resolve design community CAD/EDA environment needs and issues within the various groups.
  • Develop and apply CAD/EDA software engineering methods, theories and research techniques in the investigation and solution of facilitating the tasks of colleagues which may include:

o Setting or improving on current unified project setups
o Writing scripts, utilities, programs to automate or customize design and layout efforts
o Suggesting alternatives, improvements or changes in design flows.

  • Assess architecture and hardware limitations and work on solutions which best fit the current boundary conditions, or define new requirements to expand our boundary conditions.
  • Plan technical projects in the design and development of CAD/EDA software.
  • Define and select new approaches and implementation of CAD/EDA software engineering applications and design specifications and parameters.
  • Prepare design specifications, analysis and recommendations for presentation and approval.
  • Develop design methodology user guides and manuals.
  • May specify materials, equipment and supplies required for completion of projects and may evaluate vendor capabilities to provide required products or services


  • BS Electrical, Computer Systems, or Computer Science Degree
  • 2+ years of Software development experience
  • Experience with revision control systems (CVS, SVN, GIT, SOS)
  • Experience with EDA tools for the design and manufacturing of VLSI
  • Experience with Mentor, Synopsys and/or Cadence tool suites
  • Experience with a Linux IT Environment
  • Demonstrated experience documenting process flows using data flow diagrams, flowcharts, etc.
  • Excellent communication skills (written and verbal) are required.

To Apply:
Email your cover letter and resume in confidence to hr[at]sidense.com specifying the title of the position you are applying for in the subject line of your message. Please be sure to provide some insight into your initiative, skills and achievements.