IC Physical Design Engineer
IC Physical Design Engineer (Former Employee) – Burnaby, BC – August 16, 2012
• Block level physical design, including layout, static timing analysis, physical verification, etc.
• Formal verification (LEC), DFT stitching, Synthesis
• Static timing analysis and physical verification (DRC/LVS)
• Power EM and IR drop analysis
• 28nm customer cells development and LEF/LIB generations
• 28 power gating flow development based on ARM standard cells