o Helping design engineer to do schematic entry, BOM changes and ECO preparation on the prototype project
o Write rework instruction for the lab rework personal as well as for the ECO preparation
o Collaborate with senior design engineer troubleshooting the hardware bug for the existing hardware.
o Checking PCB design layout with Allegro viewer for possible layout issue.
o Help running unit test and 4-cornered development verification test (DVT) and generate the test report
o Exposed to Clock Termination Techniques (LVPECL, LVDS, CML) and hardware components such as ASIC(Application Specific Integrated Circuit), FPGA(Field Programmable Gate Array) chips in laboratory