The Canada R&D site, based in Montreal, is leading research and development of hardware acceleration for NFV functions.
In this role, you will be responsible for Architecture, Implementation and Characterization of a high performance FPGA based C-RAN prototype.
You will perform a wide range of duties including: System Requirements, Architecture, Implementation, Verification and Validation of the hardware portion of an FPGA based C-RAN prototype; Performance characterization of the architecture, finding performance issues and improving overall performance; Owning Architecture and Implementation of Server NIC cards and TOR switches.
Key qualifications you hold include:
-Minimum of 10 years of pertinent experience.
-Defining Hardware System Requirements of complex system.
-Experience with complex FPGA/ASIC blocks.
-Experience with Full FPGA cycle: Architecture, RTL coding, simulation, synthesis, P&R, Timing analysis and validation.
Demonstrated capability in several items from the list below:
-Understanding of data communications protocols, i.e. 100G Ethernet and its Physical Layer.
-Experience with PCIe/QPI Interface.
-Understanding of Distributed Optical Switching.
-Familiarity of Data Center Architecture.
-Understanding of a cache coherent System.
-Implementing complex algorithms in hardware.
-Development of Linux Kernel Module.
-Passionate and self-motivated.
Ability to work in a team environment:
-Excellent inter-personal communication skills.
-Ability to work on a schedule, even for un-schedule-able issues such as inventiveness.
-Actively seek out resolution to issues with team member and work co-operatively to build a coherent system.